Quantum FIREBALL PLUS AS 20.5 Manual Pagina 105
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ATA Bus Interface and ATA Commands
Quantum Fireball Plus AS 10.2/20.5/30.0/40.0/60.0 GB AT 6-43
Table 6-19 defines the twelve bytes that make up the information for each threshold
entry in the device attribute thresholds data structure. Attribute entries in the
individual threshold data structure must be in the same order and correspond to the
entries in the individual attribute data structure.
The attribute ID numbers are vendor specific. Any non-zero value in the attribute
ID number indicates an active attribute.
Attribute threshold values are to be set at the factory and are not changeable in the
field.
The data structure checksum is the two’s compliment of the result of a simple eight-
bit addition of the first 511 bytes in the data structure.
Table 6-19
Table 6-19 Table 6-19
Table 6-19
Device Attribute Thresholds Data Structure
Table 6-20
Table 6-20 Table 6-20
Table 6-20 Individual Threshold Data Structure
Description
DescriptionDescription
Description Bytes
BytesBytes
Bytes Format
FormatFormat
Format Type
TypeType
Type
Data structure revision number = 0x0004h
for this revision
2 binary Rd only
1st attribute threshold 12 Rd only
.....
.....
.....
30th attribute threshold 12 Rd only
reserved (0x00) 18 Rd only
Vendor specific 131 Rd only
Data structure checksum 1 Rd only
Total bytes 512
Description
DescriptionDescription
Description Bytes
BytesBytes
Bytes Format
FormatFormat
Format Type
TypeType
Type
Attribute ID number 1 binary Rd only
Attribute threshold (for comparison with
attribute values from 0x00 to 0xFFh)
1 binary Rd only
0x00 “always passing” threshold value to
be used for
code test purposes
0x01 minimum value for normal operation
0xFD maximum value for normal operation
0xFE invalid for threshold value - not to be
used
0xFF “always failing” threshold value to be
used for code test purposes
Reserved 10 Rd only
Total bytes 12
- December 12, 2000 1
- 81-121729-04 1
- UL/CSA/TUV/CE 2
- SERVICE CENTERS 2
- Table of Contents 3
- Chapter 4 4
- SPECIFICATIONS 4
- Chapter 5 4
- Chapter 6 5
- List of Figures 6
- List of Tables 7
- List of TablesList of Tables 7
- Table of Contents 8
- About This Manual 10
- REFERENCES 11
- 1.4 REFERENCES 11
- REFERENCESREFERENCES 11
- General Description 14
- 3.1 SPACE REQUIREMENTS 17
- SPACE REQUIREMENTS 17
- 3.2 UNPACKING INSTRUCTIONS 18
- UNPACKING INSTRUCTIONS 18
- Installation 19
- 3.3 HARDWARE OPTIONS 20
- HARDWARE OPTIONS 20
- 3.3.13.3.1 21
- Cable Select (CS) Jumper 21
- (DS jumper installed or CS 22
- 3.3.53.3.5 23
- 3.3.5 Alternate Capacity (AC) 23
- Alternate Capacity (AC) 23
- J1 Power Connector, Section A 28
- 3.103.10 33
- SYSTEM STARTUP AND OPERATION 33
- 4.1 SPECIFICATION SUMMARY 35
- SPECIFICATION SUMMARY 35
- Specifications 36
- 4.4 TIMING SPECIFICATIONS 38
- TIMING SPECIFICATIONS 38
- 4.5.34.5.3 40
- 4.5.3 Power Requirements 40
- Power Requirements 40
- 4.6 ACOUSTICS 41
- ACOUSTICSACOUSTICS 41
- ACOUSTICS 41
- 4.9 SHOCK AND VIBRATION 43
- SHOCK AND VIBRATION 43
- Basic Principles of Operation 47
- RG, WG) and Command 52
- 5.2.25.2.2 53
- 5.2.2 Read/Write ASIC 53
- Read/Write ASIC 53
- 5.3.25.3.2 57
- Head and Cylinder Skewing 57
- 5.3.35.3.3 58
- 5.3.45.3.4 60
- 5.3.4 Defect Management 60
- Defect Management 60
- Signal Line Definitions 70
- 6.4.26.4.2 71
- 6.4.2 Host Interface Timing 71
- Host Interface Timing 71
- PIO Host Interface Timing 72
- PIO Interface Timing 72
- Initiating a Data In Burst 77
- Sustained Data In Burst 77
- Host Pausing a Data In Burst 78
- Initiating a Data Out Burst 79
- Sustained Data Out Burst 80
- Figure 6-11 81
- Figure 6-11 Figure 6-11 81
- Host Interface RESET Timing 82
- 6.5 REGISTER ADDRESS DECODING 83
- REGISTER ADDRESS DECODING 83
- Device Control Register Bits 85
- 6.6.26.6.2 86
- 6.6.2 Command Block Registers 86
- Command Block Registers 86
- Error Register Bits 87
- Drive Head Register Bits 88
- Status Register Bits 89
- 6.7.26.7.2 92
- 6.7.2 Read Sectors 92
- Read SectorsRead Sectors 92
- Read Sectors 92
- 6.7.36.7.3 93
- 6.7.3 Write Sectors 93
- Write SectorsWrite Sectors 93
- Write Sectors 93
- 6.7.46.7.4 94
- 6.7.4 Read Verify Sectors 94
- Read Verify Sectors 94
- 6.7.56.7.5 95
- 6.7.5 Seek 95
- SeekSeek 95
- 6.7.66.7.6 96
- Execute Drive Diagnostics 96
- 6.7.76.7.7 98
- INITIALIZE DRIVE PARAMETERS 98
- 6.7.86.7.8 99
- 6.7.8 Download Microcode 99
- Download Microcode 99
- 6.7.96.7.9 100
- 6.7.9 SMART 100
- SMARTSMART 100
- Device SMART Data Structure 106
- 6.7.116.7.11 111
- 6.7.11 Write Multiple Sectors 111
- Write Multiple Sectors 111
- 6.7.126.7.12 112
- 6.7.12 Set Multiple Mode 112
- Set Multiple Mode 112
- 6.7.136.7.13 113
- 6.7.13 Read DMA 113
- Read DMARead DMA 113
- Read DMA 113
- 6.7.146.7.14 114
- 6.7.14 Write DMA 114
- Write DMAWrite DMA 114
- Write DMA 114
- 6.7.156.7.15 116
- 6.7.15 STANDBY IMMEDIATE 116
- STANDBY IMMEDIATE 116
- 6.7.166.7.16 117
- 6.7.16 IDLE IMMEDIATE 117
- IDLE IMMEDIATEIDLE IMMEDIATE 117
- IDLE IMMEDIATE 117
- 6.7.176.7.17 118
- 6.7.17 STANDBY 118
- STANDBYSTANDBY 118
- 6.7.186.7.18 119
- 6.7.18 IDLE 119
- IDLEIDLE 119
- 6.7.196.7.19 120
- 6.7.19 READ BUFFER 120
- READ BUFFERREAD BUFFER 120
- READ BUFFER 120
- 6.7.206.7.20 121
- 6.7.20 CHECK POWER MODE 121
- CHECK POWER MODE 121
- 6.7.216.7.21 122
- 6.7.21 SLEEP 122
- SLEEPSLEEP 122
- 6.7.226.7.22 123
- 6.7.22 FLUSH CACHE 123
- FLUSH CACHEFLUSH CACHE 123
- FLUSH CACHE 123
- 6.7.236.7.23 124
- 6.7.23 WRITE BUFFER 124
- WRITE BUFFERWRITE BUFFER 124
- WRITE BUFFER 124
- 6.7.246.7.24 125
- 6.7.24 IDENTIFY DRIVE 125
- IDENTIFY DRIVE 125
- Identify Drive Parameters 127
- Transfer/Mode Values 133
- 6.7.276.7.27 134
- 6.7.27 Read Defect List 134
- Read Defect List 134
- DEFECT LIST DATA FORMAT 136
- DEFECT ENTRY DATA FORMAT 136
- 6.7.286.7.28 137
- 6.7.28 Configuration 137
- ConfigurationConfiguration 137
- Configuration 137
- Configuration Command Format 140
- 6.7.296.7.29 141
- Host Protected Mode Feature 141
- 6.8 ERROR REPORTING 148
- ERROR REPORTING 148
- GLOSSARY 151
- GLOSSARYGLOSSARY 151
- Glossary 152
- INDEXINDEX 159
- I-3 161
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